[ CourseBoat.com ] Udemy - VSD - Physical Design Flow

Torrent Hash:
0BE6699C7D085C3EE818BCBC06B956D04DB9D433
Number of Files:
62
Content Size:
1.5GB
Convert On:
2022-03-15
Magnet Link:
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File Name
Size
Get Bonus Downloads Here.url
180B
~Get Your Files Here !/01 - Physical Design Flow Overview/001 Floor-Planning Steps.mp4
11.94MB
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~Get Your Files Here !/01 - Physical Design Flow Overview/001 Floor-Planning Steps_en.vtt
14.95KB
~Get Your Files Here !/01 - Physical Design Flow Overview/002 Netlist Binding And Placement Optimization.mp4
15.2MB
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~Get Your Files Here !/01 - Physical Design Flow Overview/002 Netlist Binding And Placement Optimization_en.vtt
13.09KB
~Get Your Files Here !/01 - Physical Design Flow Overview/003 Placement Timing And Clock Tree Synthesis.mp4
18.28MB
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~Get Your Files Here !/01 - Physical Design Flow Overview/003 Placement Timing And Clock Tree Synthesis_en.vtt
12.7KB
~Get Your Files Here !/01 - Physical Design Flow Overview/004 Clock Net Shielding.mp4
14.72MB
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~Get Your Files Here !/01 - Physical Design Flow Overview/004 Clock Net Shielding_en.vtt
13.59KB
~Get Your Files Here !/01 - Physical Design Flow Overview/005 Route - DRC Clean - Parasitics Extraction - Final STA.mp4
22.24MB
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~Get Your Files Here !/01 - Physical Design Flow Overview/005 Route - DRC Clean - Parasitics Extraction - Final STA_en.vtt
12.7KB
~Get Your Files Here !/02 - Floorplanning/001 Utilization Factor And Aspect Ratio.mp4
8.85MB
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~Get Your Files Here !/02 - Floorplanning/001 Utilization Factor And Aspect Ratio_en.vtt
12.45KB
~Get Your Files Here !/02 - Floorplanning/002 Concept Of Pre-Placed Cells.mp4
8.84MB
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~Get Your Files Here !/02 - Floorplanning/002 Concept Of Pre-Placed Cells_en.vtt
13.32KB
~Get Your Files Here !/02 - Floorplanning/003 De-coupling Capacitors.mp4
11.36MB
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~Get Your Files Here !/02 - Floorplanning/003 De-coupling Capacitors_en.vtt
13.55KB
~Get Your Files Here !/02 - Floorplanning/004 Power Planning.mp4
12.29MB
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~Get Your Files Here !/02 - Floorplanning/004 Power Planning_en.vtt
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~Get Your Files Here !/02 - Floorplanning/005 Pin Placement And Logical Cell Placement Blockage.mp4
46.24MB
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~Get Your Files Here !/02 - Floorplanning/005 Pin Placement And Logical Cell Placement Blockage_en.vtt
13.6KB
~Get Your Files Here !/03 - Placement/001 Net-list Binding And Placement.mp4
46.34MB
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~Get Your Files Here !/03 - Placement/001 Net-list Binding And Placement_en.vtt
13.18KB
~Get Your Files Here !/03 - Placement/002 Optimize Placement Using Estimated Wire Length And Capacitance.mp4
91.34MB
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~Get Your Files Here !/03 - Placement/002 Optimize Placement Using Estimated Wire Length And Capacitance_en.vtt
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~Get Your Files Here !/03 - Placement/003 Optimize Placement Conitnued.mp4
86.89MB
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~Get Your Files Here !/03 - Placement/003 Optimize Placement Conitnued_en.vtt
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~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/001 Setup Timing Analysis And Introduction to Flip-Flop Setup Time.mp4
31.52MB
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~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/001 Setup Timing Analysis And Introduction to Flip-Flop Setup Time_en.vtt
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~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/002 Introduction To Clock Jitter and Uncertainty.mp4
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~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/002 Introduction To Clock Jitter and Uncertainty_en.vtt
10.65KB
~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/003 Setup Timing Analysis with Multiple Clocks.mp4
34.35MB
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~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/004 Multiple Clock Timing Analysis And Introduction To Data Slew Check_en.vtt
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~Get Your Files Here !/04 - Timing Analysis With Ideal Clocks/005 Data Slew Check.mp4
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~Get Your Files Here !/05 - Clock Tree Synthesis And Signal Integrity/001 Clock Tree Routing And Buffering using H-Tree Algorithm.mp4
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~Get Your Files Here !/05 - Clock Tree Synthesis And Signal Integrity/002 Crosstalk And Clock Net Shielding_en.vtt
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~Get Your Files Here !/05 - Clock Tree Synthesis And Signal Integrity/003 Static Timing Analysis With Real Clocks.mp4
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~Get Your Files Here !/05 - Clock Tree Synthesis And Signal Integrity/004 Hold Timing Analysis Concluded.mp4
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~Get Your Files Here !/05 - Clock Tree Synthesis And Signal Integrity/004 Hold Timing Analysis Concluded_en.vtt
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~Get Your Files Here !/05 - Clock Tree Synthesis And Signal Integrity/005 Multiple Clocks Setup Timing Analysis With Real Clocks.mp4
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~Get Your Files Here !/05 - Clock Tree Synthesis And Signal Integrity/005 Multiple Clocks Setup Timing Analysis With Real Clocks_en.vtt
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~Get Your Files Here !/06 - Routing And Design Rule Check (DRC)/001 Introduction to Maze Routing - Lee's Algorithm.mp4
88.2MB
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~Get Your Files Here !/06 - Routing And Design Rule Check (DRC)/001 Introduction to Maze Routing - Lee's Algorithm_en.vtt
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~Get Your Files Here !/06 - Routing And Design Rule Check (DRC)/002 Lee's Algorithm Conclusion.mp4
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~Get Your Files Here !/06 - Routing And Design Rule Check (DRC)/002 Lee's Algorithm Conclusion_en.vtt
13.96KB
~Get Your Files Here !/06 - Routing And Design Rule Check (DRC)/003 Design Rule Check.mp4
99.45MB
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~Get Your Files Here !/06 - Routing And Design Rule Check (DRC)/003 Design Rule Check_en.vtt
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~Get Your Files Here !/07 - Parasitics Extraction/001 Introduction to IEEE 1481 - 1999 SPEF format.mp4
78.55MB
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~Get Your Files Here !/07 - Parasitics Extraction/001 Introduction to IEEE 1481 - 1999 SPEF format_en.vtt
12.49KB
~Get Your Files Here !/07 - Parasitics Extraction/002 SPEF Representation of a NET.mp4
65.76MB
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~Get Your Files Here !/07 - Parasitics Extraction/002 SPEF Representation of a NET_en.vtt
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~Get Your Files Here !/07 - Parasitics Extraction/003 Distributed Resistance And Capacitance Representation in SPEF.mp4
79MB
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~Get Your Files Here !/07 - Parasitics Extraction/003 Distributed Resistance And Capacitance Representation in SPEF_en.vtt
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~Get Your Files Here !/07 - Parasitics Extraction/004 SPEF Header Description, Physical Design Flow Conclusion and What Next !!.mp4
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~Get Your Files Here !/07 - Parasitics Extraction/004 SPEF Header Description, Physical Design Flow Conclusion and What Next !!_en.vtt
11.95KB
~Get Your Files Here !/Bonus Resources.txt
386B

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